Number | 586
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Notify-List |
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Category | errata
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Synopsis | signedness of case expression size extensions (9.5)
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State | lrmdraft
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Class | errata-discuss
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Arrival-Date | Jun 09 2004
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Originator | sharp@cadence.com (Behavioral Task Force)
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Release |
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Environment |
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Description |
This issue was posted to comp.lang.verilog. Section 9.5 on case statements says that "The length of all the case item expressions, as well as the case expression in the parentheses, shall be made equal to the length of the longest case expression and case item expression." It does not say anything about the signedness of these expressions, which would affect how they were extended. It is my opinion, as I stated in errata/344, that case expressions and case item expressions should be treated as operands of a really big compare "operator". This means that if any operand is unsigned, they should all be treated as unsigned. This is consistent with the rest of the language rules, where operands that affect each others size also affect each others signedness (with the one explicitly stated exception that the left-hand-side of an assignment does not affect the signedness of the right-hand-side). The posting stated that different simulators treated this differently. I have verified that the implementation in Verilog-XL, which was the basis for the original proposal, matches the interpretation I have suggested. Unfortunately, NC-Verilog does not, instead treating the signedness of each expression as self-determined. If this interpretation is adopted, we would need to fix the tool. |
Fix |
In 9.5, before the NOTE, AFTER The length of all the case item expressions, as well as the case expression in the parentheses, shall be made equal to the length of the longest case expression and case item expression. ADD If any of these expressions is unsigned, then all of them are treated as unsigned. If all of these expressions are signed, then they are treated as signed. |
Audit-Trail |
From: Steven Sharp <sharp@cadence.com> To: etf-bugs@boyd.com Cc: Subject: errata/586: PROPOSAL - Case signedness Date: Fri, 11 Jun 2004 13:16:39 -0400 (EDT) In 9.5, before the NOTE, AFTER The length of all the case item expressions, as well as the case expression in the parentheses, shall be made equal to the length of the longest case expression and case item expression. ADD If any of these expressions is unsigned, then all of them are treated as unsigned. If all of these expressions are signed, then they are treated as signed. Steven Sharp sharp@cadence.com From: Shalom Bresticker <Shalom.Bresticker@freescale.com> To: Steven Sharp <sharp@cadence.com> Cc: etf-bugs@boyd.com Subject: Re: errata/586: PROPOSAL - Case signedness Date: Sun, 13 Jun 2004 10:14:40 +0300 Steven, Can you also suggest some wording to deal with #344, where some or all of the expressions are real? Shalom On Fri, 11 Jun 2004, Steven Sharp wrote: > In 9.5, before the NOTE, AFTER > > The length of all the case item expressions, as well as the case expression > in the parentheses, shall be made equal to the length of the longest case > expression and case item expression. > > ADD > > If any of these expressions is unsigned, then all of them are treated as > unsigned. If all of these expressions are signed, then they are treated > as signed. -- Shalom Bresticker Shalom.Bresticker @freescale.com Design & Reuse Methodology Tel: +972 9 9522268 Freescale Semiconductor Israel, Ltd. Fax: +972 9 9522890 POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 5441478 [ ]Freescale Internal Use Only [ ]Freescale Confidential Proprietary From: Shalom.Bresticker@freescale.com To: Steven Sharp <sharp@cadence.com> Cc: etf-bugs@boyd.com Subject: Re: errata/586: PROPOSAL - Case signedness Date: Sun, 13 Jun 2004 09:48:16 +0300 (IDT) Steven, Can you also suggest some wording to deal with #344, where some or all of the expressions are real? Shalom On Fri, 11 Jun 2004, Steven Sharp wrote: > In 9.5, before the NOTE, AFTER > > The length of all the case item expressions, as well as the case expression > in the parentheses, shall be made equal to the length of the longest case > expression and case item expression. > > ADD > > If any of these expressions is unsigned, then all of them are treated as > unsigned. If all of these expressions are signed, then they are treated > as signed. -- Shalom Bresticker Shalom.Bresticker @freescale.com Design & Reuse Methodology Tel: +972 9 9522268 Freescale Semiconductor Israel, Ltd. Fax: +972 9 9522890 POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 5441478 [ ]Freescale Internal Use Only [ ]Freescale Confidential Proprietary From: Steven Sharp <sharp@cadence.com> To: sharp@cadence.com, Shalom.Bresticker@freescale.com Cc: etf-bugs@boyd.com Subject: Re: errata/586: PROPOSAL - Case signedness Date: Wed, 23 Jun 2004 20:53:15 -0400 (EDT) >Can you also suggest some wording to deal with #344, where some or all of >the expressions are real? I considered doing this at the same time. My concern is that the rules for expressions with real operands in 4.5 are questionable, or at least incomplete. They need to be rewritten along with other things in that section. I wasn't sure I wanted to start the rewrite with case expressions first, before the general rules for expressions were fixed. Steven Sharp sharp@cadence.com Fix replaced by sharp@cadence.com on Mon Jun 28 09:30:48 2004 In 9.5, before the NOTE, AFTER The length of all the case item expressions, as well as the case expression in the parentheses, shall be made equal to the length of the longest case expression and case item expression. ADD If any of these expressions is unsigned, then all of them are treated as unsigned. If all of these expressions are signed, then they are treated as signed. From: Steven Sharp <sharp@cadence.com> To: etf-bugs@boyd.com Cc: Subject: errata/586: case signedness testcases Date: Wed, 30 Jun 2004 14:06:31 -0400 (EDT) --Sounder_of_Swine_756_000 Content-Type: TEXT/plain; charset=us-ascii Content-MD5: lpdsz/XVPtlgN8/axXicrw== Shalom suggests that these testcases are not too long to attach to the erratum, so I will do so. The versions I am attaching here are slightly different from the ones I mailed out to individuals earlier. They contain an additional if-then-else formulation that is supposed to match the case. There was also a bug in the originals I was given, and the original author fixed it in a different way than I did. Steven Sharp sharp@cadence.com --Sounder_of_Swine_756_000 Content-Type: TEXT/plain; name="case_approaches.v"; charset=us-ascii; x-unix-mode=0664 Content-Description: case_approaches.v Content-MD5: Z2dFNwhxhJziAxlkUdJCbQ== //ABW: assumption is that first approach is valid //other approaches are emulated by if-else-if sequences `define signed4 reg signed [3:0] `define unsigned4 reg [3:0] `define signed8 reg signed [7:0] `define unsigned8 reg [7:0] module case_approaches; //----------------------------------------------------------------------------- task test1; `signed4 rs4_1; `signed8 rs8_1, rs8_2; begin $display("Test 1 - all expressions are signed:"); //when all expressions are signed - there is no difference //valid result is item1 in all approaches rs4_1 = 4'sb1000; rs8_1 = 8'sb11111000; rs8_2 = 8'sb00001000; #1; case(rs4_1) rs8_1 : $display("item1 - valid"); rs8_2 : $display("item2"); default : $display("default"); endcase begin : first `signed8 temp; temp = 1 ? rs4_1 : temp; if (temp === rs8_1) $display("item1 - valid"); else if (temp === rs8_2) $display("item2"); else $display("default"); end begin : second `signed8 temp; temp = rs4_1; if (temp === rs8_1) $display("item1 - valid"); else if (temp === rs8_2) $display("item2"); else $display("default"); end begin : third `signed8 temp; temp = rs4_1; if (temp === rs8_1) $display("item1 - valid"); else if (temp === rs8_2) $display("item2"); else $display("default"); end begin : fourth `signed8 temp; `signed8 temp1; `signed8 temp2; temp = rs4_1; temp1 = rs8_1; if (temp === temp1) $display("item1 - valid"); else begin temp2 = rs8_2; if (temp === temp2) $display("item2"); else $display("default"); end end end endtask //----------------------------------------------------------------------------- task test2; `signed4 rs4_1; `signed8 rs8_1; `unsigned8 ru8_2; begin $display("Test 2 - case item expressions influence case expression:"); //now one of the items is unsigned - if first approach is valid then all //expressions will get unsigned which means that 4'sb1000 will be 8'b00001000 //effectively and item2 will print out //for other approaches item1 is valid result rs4_1 = 4'sb1000; rs8_1 = 8'sb11111000; ru8_2 = 8'b00001000; #1; case(rs4_1) rs8_1 : $display("item1"); ru8_2 : $display("item2 - valid"); default : $display("default"); endcase begin : first `unsigned8 temp; temp = 1 ? rs4_1 : temp; if (temp === rs8_1) $display("item1"); else if (temp === ru8_2) $display("item2 - valid"); else $display("default"); end begin : second `unsigned8 temp; temp = rs4_1; if (temp === rs8_1) $display("item1 - valid"); else if (temp === ru8_2) $display("item2"); else $display("default"); end begin : third `signed8 temp; temp = rs4_1; if (temp === rs8_1) $display("item1 - valid"); else if (temp === ru8_2) $display("item2"); else $display("default"); end begin : fourth `signed8 temp; `signed8 temp1; `unsigned8 temp2; temp = rs4_1; temp1 = rs8_1; if (temp === temp1) $display("item1 - valid"); else begin temp2 = ru8_2; if (temp === temp2) $display("item2"); else $display("default"); end end end endtask //----------------------------------------------------------------------------- task test3; `signed8 rs8_1; `signed4 rs4_1; `unsigned8 ru8_2; begin $display("Test 3 - case item expression influence each other:"); //now one of the item is unsigned which makes difference for the other item //this test shows difference between second and third approach rs8_1 = 8'sb00001000; rs4_1 = 4'sb1000; ru8_2 = 8'b00001000; #1; case(rs8_1) rs4_1 : $display("item1 - valid"); ru8_2 : $display("item2"); //would match if order was different default : $display("default"); endcase begin : first `unsigned8 temp; temp = 1 ? rs8_1 : temp; if (temp === rs4_1) $display("item1 - valid"); else if (temp === ru8_2) $display("item2"); //would match if order was different else $display("default"); end begin : second `unsigned8 temp; temp = rs8_1; if (temp === rs4_1) $display("item1 - valid"); else if (temp === ru8_2) $display("item2"); //would match if order was different else $display("default"); end begin : third `signed8 temp; temp = rs8_1; if (temp === rs4_1) $display("item1"); else if (temp === ru8_2) $display("item2 - valid"); else $display("default"); end begin : fourth `signed8 temp; `signed8 temp1; `unsigned8 temp2; temp = rs8_1; temp1 = rs4_1; if (temp === temp1) $display("item1"); else begin temp2 = ru8_2; if (temp === temp2) $display("item2 - valid"); else $display("default"); end end end endtask //----------------------------------------------------------------------------- task test4; `unsigned8 ru8_1; `signed4 rs4_1; `signed8 rs8_2; begin $display("Test 4 - case expression influences case item expressions:"); //now case expression is unsigned which makes difference for case item //this test shows difference between third and fourth approach ru8_1 = 8'b11111000; rs4_1 = 4'sb1000; rs8_2 = 8'sb00001000; #1; case(ru8_1) rs4_1 : $display("item1"); rs8_2 : $display("item2"); default : $display("default - valid"); endcase begin : first `unsigned8 temp; temp = 1 ? ru8_1 : temp; if (temp === rs4_1) $display("item1"); else if (temp === rs8_2) $display("item2"); else $display("default - valid"); end begin : second `unsigned8 temp; temp = ru8_1; if (temp === rs4_1) $display("item1"); else if (temp === rs8_2) $display("item2"); else $display("default - valid"); end begin : third `unsigned8 temp; temp = ru8_1; if (temp === rs4_1) $display("item1"); else if (temp === rs8_2) $display("item2"); else $display("default - valid"); end begin : fourth `unsigned8 temp; `signed8 temp1; `signed8 temp2; temp = ru8_1; temp1 = rs4_1; if (temp === temp1) $display("item1 - valid"); else begin temp2 = rs8_2; if (temp === temp2) $display("item2"); else $display("default"); end end end endtask //----------------------------------------------------------------------------- initial begin test1; test2; test3; test4; end //this block is only to make it more unlikely that compiler will know the //values of variables in advance and treat them as constants - delays between //value preparations and case constructs are for the same reason initial begin #10; test1.rs4_1 = 0; test1.rs8_1 = 0; test1.rs8_2 = 0; test2.rs4_1 = 0; test2.rs8_1 = 0; test2.ru8_2 = 0; test3.rs8_1 = 0; test3.rs4_1 = 0; test3.ru8_2 = 0; test4.ru8_1 = 0; test4.rs4_1 = 0; test4.rs8_2 = 0; #10; test1.rs4_1 = 1; test1.rs8_1 = 1; test1.rs8_2 = 1; test2.rs4_1 = 1; test2.rs8_1 = 1; test2.ru8_2 = 1; test3.rs8_1 = 1; test3.rs4_1 = 1; test3.ru8_2 = 1; test4.ru8_1 = 1; test4.rs4_1 = 1; test4.rs8_2 = 1; end endmodule --Sounder_of_Swine_756_000 Content-Type: TEXT/plain; name="case_approaches2.v"; charset=us-ascii; x-unix-mode=0664 Content-Description: case_approaches2.v Content-MD5: g15FWqcbTSAuhUI8E8WfSQ== //ABW: assumption is that first approach is valid //other approaches are emulated by if-else-if sequences //this is second test that uses expressions instead of constants `define signed4 reg signed [3:0] `define unsigned4 reg [3:0] `define signed8 reg signed [7:0] `define unsigned8 reg [7:0] module case_approaches; `signed4 rs4_1; initial rs4_1 = 4'sb1000; `signed8 rs8_0; initial rs8_0 = 8'sb0; `define signed_expr (rs4_1 + rs8_0) //when computed as signed it gives 8'sb11111000 //when computed as unsigned it gives 8'b00001000 //----------------------------------------------------------------------------- task test1; `signed8 rs8_1, rs8_2; begin $display("Test 1 - all expressions are signed:"); //when all expressions are signed - there is no difference //valid result is item1 in all approaches rs8_1 = 8'sb11111000; rs8_2 = 8'sb00001000; #1; case(`signed_expr) rs8_1 : $display("item1 - valid"); rs8_2 : $display("item2"); default : $display("default"); endcase begin : first `signed8 temp; temp = 1 ? `signed_expr : temp; if (temp === rs8_1) $display("item1 - valid"); else if (temp === rs8_2) $display("item2"); else $display("default"); end begin : second `signed8 temp; temp = `signed_expr; if (temp === rs8_1) $display("item1 - valid"); else if (temp === rs8_2) $display("item2"); else $display("default"); end begin : third `signed8 temp; temp = `signed_expr; if (temp === rs8_1) $display("item1 - valid"); else if (temp === rs8_2) $display("item2"); else $display("default"); end begin : fourth `signed8 temp; `signed8 temp1; `signed8 temp2; temp = `signed_expr; temp1 = rs8_1; if (temp === temp1) $display("item1 - valid"); else begin temp2 = rs8_2; if (temp === temp2) $display("item2"); else $display("default"); end end end endtask //----------------------------------------------------------------------------- task test2; `signed8 rs8_1; `unsigned8 ru8_2; begin $display("Test 2 - case item expressions influence case expression:"); //now one of the items is unsigned - if first approach is valid then all //expressions will get unsigned which means that `signed_expr will be 8'b00001000 //effectively and item2 will print out //for other approaches item1 is valid result rs8_1 = 8'sb11111000; ru8_2 = 8'b00001000; #1; case(`signed_expr) rs8_1 : $display("item1"); ru8_2 : $display("item2 - valid"); default : $display("default"); endcase begin : first `unsigned8 temp; temp = 1 ? `signed_expr : temp; if (temp === rs8_1) $display("item1"); else if (temp === ru8_2) $display("item2 - valid"); else $display("default"); end begin : second `unsigned8 temp; temp = `signed_expr; if (temp === rs8_1) $display("item1 - valid"); else if (temp === ru8_2) $display("item2"); else $display("default"); end begin : third `signed8 temp; temp = `signed_expr; if (temp === rs8_1) $display("item1 - valid"); else if (temp === ru8_2) $display("item2"); else $display("default"); end begin : fourth `signed8 temp; `signed8 temp1; `unsigned8 temp2; temp = `signed_expr; temp1 = rs8_1; if (temp === temp1) $display("item1 - valid"); else begin temp2 = ru8_2; if (temp === temp2) $display("item2"); else $display("default"); end end end endtask //----------------------------------------------------------------------------- task test3; `signed8 rs8_1; `unsigned8 ru8_2; begin $display("Test 3 - case item expression influence each other:"); //now one of the item is unsigned which makes difference for the other item //this test shows difference between second and third approach rs8_1 = 8'sb00001000; ru8_2 = 8'b00001000; #1; case(rs8_1) `signed_expr : $display("item1 - valid"); ru8_2 : $display("item2"); //would match if order was different default : $display("default"); endcase begin : first `unsigned8 temp; temp = 1 ? rs8_1 : temp; if (temp === `signed_expr) $display("item1 - valid"); else if (temp === ru8_2) $display("item2"); //would match if order was different else $display("default"); end begin : second `unsigned8 temp; temp = rs8_1; if (temp === `signed_expr) $display("item1 - valid"); else if (temp === ru8_2) $display("item2"); //would match if order was different else $display("default"); end begin : third `signed8 temp; temp = rs8_1; if (temp === `signed_expr) $display("item1"); else if (temp === ru8_2) $display("item2 - valid"); else $display("default"); end begin : fourth `signed8 temp; `signed8 temp1; `unsigned8 temp2; temp = rs8_1; temp1 = `signed_expr; if (temp === temp1) $display("item1"); else begin temp2 = ru8_2; if (temp === temp2) $display("item2 - valid"); else $display("default"); end end end endtask //----------------------------------------------------------------------------- task test4; `unsigned8 ru8_1; `signed8 rs8_2; begin $display("Test 4 - case expression influences case item expressions:"); //now case expression is unsigned which makes difference for case item //this test shows difference between third and fourth approach ru8_1 = 8'b11111000; rs8_2 = 8'sb00001000; #1; case(ru8_1) `signed_expr : $display("item1"); rs8_2 : $display("item2"); default : $display("default - valid"); endcase begin : first `unsigned8 temp; temp = 1 ? ru8_1 : temp; if (temp === `signed_expr) $display("item1"); else if (temp === rs8_2) $display("item2"); else $display("default - valid"); end begin : second `unsigned8 temp; temp = ru8_1; if (temp === `signed_expr) $display("item1"); else if (temp === rs8_2) $display("item2"); else $display("default - valid"); end begin : third `unsigned8 temp; temp = ru8_1; if (temp === `signed_expr) $display("item1"); else if (temp === rs8_2) $display("item2"); else $display("default - valid"); end begin : fourth `unsigned8 temp; `signed8 temp1; `signed8 temp2; temp = ru8_1; temp1 = `signed_expr; if (temp === temp1) $display("item1 - valid"); else begin temp2 = rs8_2; if (temp === temp2) $display("item2"); else $display("default"); end end end endtask //----------------------------------------------------------------------------- initial begin test1; test2; test3; test4; end //this block is only to make it more unlikely that compiler will know the //values of variables in advance and treat them as constants - delays between //value preparations and case constructs are for the same reason initial begin #10; test1.rs8_1 = 0; test1.rs8_2 = 0; test2.rs8_1 = 0; test2.ru8_2 = 0; test3.rs8_1 = 0; test3.ru8_2 = 0; test4.ru8_1 = 0; test4.rs8_2 = 0; #10; test1.rs8_1 = 1; test1.rs8_2 = 1; test2.rs8_1 = 1; test2.ru8_2 = 1; test3.rs8_1 = 1; test3.ru8_2 = 1; test4.ru8_1 = 1; test4.rs8_2 = 1; end endmodule --Sounder_of_Swine_756_000-- Fix replaced by stefen@boyd.com on Thu Jul 8 11:22:26 2004 In 9.5, before the NOTE, AFTER The length of all the case item expressions, as well as the case expression in the parentheses, shall be made equal to the length of the longest case expression and case item expression. ADD If any of these expressions is unsigned, then all of them are treated as unsigned. If all of these expressions are signed, then they are treated as signed. From: Shalom.Bresticker@freescale.com To: etf-bugs@boyd.com Cc: Subject: Re: errata/586: PROPOSAL - signedness of case expression size extensions (9.5) Date: Thu, 15 Jul 2004 14:23:05 +0300 (IDT) In doing this, I changed "are treated" to "shall be treated" in both places. Shalom > ADD > > If any of these expressions is unsigned, then all of them > are treated as unsigned. If all of these expressions are > signed, then they are treated as signed. > > http://wa.boyd.com/cgi-bin/issueproposal.pl?cmd=view&database=default&pr=586 -- Shalom Bresticker Shalom.Bresticker @freescale.com Design & Reuse Methodology Tel: +972 9 9522268 Freescale Semiconductor Israel, Ltd. Fax: +972 9 9522890 POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 5441478 [ ]Freescale Internal Use Only [ ]Freescale Confidential Proprietary |
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