ISSUE 225

Number 225
Category errata
Synopsis 12.3.3: The fourth port direction
State lrmdraft
Class errata-discuss
Arrival-DateDec 20 2002
Originator "Brad Pierce" <Brad.Pierce@synopsys.com>
Release 2001b: 12.3.3
Environment
Description
Port directions are not declared directly, but are instead implied
by the directions declared for port identifiers within port expressions.

When the port expression is a concatenation and the port identifiers
within it are declared with mixed directions, what is the direction of
the port?

module m (.p({a,b})) ;
input a;
output b;
not(b,a);
endmodule

To me, it seems like either p is being declared here as an inout
(no coercion involved) or this is an error. But I see only one place
in the standard that speaks to this, namely, Table 139, which says
there are actually four port directions --

Input only
Output only
Bidirectional (input and output)
A concatenation of input ports and output ports

I think the fourth item is trying to talk about a concatenation of
port expressions. If so, the function acc_fetch_direction() would
probably not return "accInout" for port p, but instead would return
"accMixedIo".

(This issue is spun off from issue #54.)

-- Brad
Fix
Add the example:

module mixed_direction (.p({a, e}));
input a; // p contains both input and output directions
output e;

Audit-Trail
Date: Sun, 10 Aug 2003 17:07:01 -0700
From: asic@sympatico.ca
To: etf-bugs@boyd.com
Subject: errata/225: PROPOSAL - The fourth port direction


Add the example:

module m (.p({a,b})) ;
input a;
output b;
not(b,a);
endmodule

at the end of the examples section in 12.3.3.
Add a comment that mixed IO is allowed in an expression that is a concatenation.
Stu Sutherland tried it in Verilog-XL, NC, VCS and ModelSim and it is legal.

Regards,

Anders

http://boydtechinc.com/cgi-bin/issueproposal.pl?cmd=view&pr=225

From: Shalom Bresticker <Shalom.Bresticker@motorola.com>
To: ptf@boyd.com, etf-bugs@boyd.com
Cc:
Subject: Re: errata/225: PROPOSAL - The fourth port direction
Date: Mon, 11 Aug 2003 12:14:50 +0300

Question:

In Annex G (vpi_user.h), on p. 818 of 1364-2001b, the following appears:

#define vpiDirection 20 /* direction of port: */
#define vpiInput 1 /* input */
#define vpiOutput 2 /* output */
#define vpiInout 3 /* inout */
#define vpiMixedIO 4 /* mixed input-output */
#define vpiNoDirection 5 /* no direction */

What does "no direction" mean?

Thanks,
Shalom


asic@sympatico.ca wrote:

> Add the example:
>
> module m (.p({a,b})) ;
> input a;
> output b;
> not(b,a);
> endmodule
>
> at the end of the examples section in 12.3.3.
> Add a comment that mixed IO is allowed in an expression that is a concatenation.
> Stu Sutherland tried it in Verilog-XL, NC, VCS and ModelSim and it is legal.
>
> Regards,
>
> Anders
>
> http://boydtechinc.com/cgi-bin/issueproposal.pl?cmd=view&pr=225

--
Shalom Bresticker Shalom.Bresticker@motorola.com
Design & Reuse Methodology Tel: +972 9 9522268
Motorola Semiconductor Israel, Ltd. Fax: +972 9 9522890
POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 441478




From: Charles Dawson <chas@cadence.com>
To: Shalom Bresticker <Shalom.Bresticker@motorola.com>
Cc: ptf@boyd.com, etf-bugs@boyd.com
Subject: Re: errata/225: PROPOSAL - The fourth port direction
Date: Mon, 11 Aug 2003 13:17:48 -0400

I've been trying to think of why we needed this, and I think I have come
up with something. In VPI, for any given port handle you can ask what it's
direction would be. In the case of a concatenation, there would be no answer
without vpiMixedIO. If it got vpiMixedIO, a reasonable application would
then iterate on the bits of the port and fetch the direction for each bit.
This is not something that is very relevant from the HDL perspective.

-Chas


Shalom Bresticker wrote:
> Precedence: bulk
>
> Question:
>
> In Annex G (vpi_user.h), on p. 818 of 1364-2001b, the following appears:
>
> #define vpiDirection 20 /* direction of port: */
> #define vpiInput 1 /* input */
> #define vpiOutput 2 /* output */
> #define vpiInout 3 /* inout */
> #define vpiMixedIO 4 /* mixed input-output */
> #define vpiNoDirection 5 /* no direction */
>
> What does "no direction" mean?
>
> Thanks,
> Shalom
>
>
> asic@sympatico.ca wrote:
>
>
>>Add the example:
>>
>>module m (.p({a,b})) ;
>> input a;
>> output b;
>> not(b,a);
>> endmodule
>>
>>at the end of the examples section in 12.3.3.
>>Add a comment that mixed IO is allowed in an expression that is a concatenation.
>>Stu Sutherland tried it in Verilog-XL, NC, VCS and ModelSim and it is legal.
>>
>>Regards,
>>
>> Anders
>>
>>http://boydtechinc.com/cgi-bin/issueproposal.pl?cmd=view&pr=225
>
>
> --
> Shalom Bresticker Shalom.Bresticker@motorola.com
> Design & Reuse Methodology Tel: +972 9 9522268
> Motorola Semiconductor Israel, Ltd. Fax: +972 9 9522890
> POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 441478
>
>
>
>


--
Charles Dawson
Senior Engineering Manager
NC-Verilog Team
Cadence Design Systems, Inc.
270 Billerica Road
Chelmsford, MA 01824
(978) 262 - 6273
chas@cadence.com



From: David Roberts <roberts@cadence.com>
To: Charles Dawson <chas@cadence.com>
Cc: Shalom Bresticker <Shalom.Bresticker@motorola.com>, ptf@boyd.com,
etf-bugs@boyd.com
Subject: Re: errata/225: PROPOSAL - The fourth port direction
Date: Mon, 11 Aug 2003 13:25:30 -0400

Charles Dawson writes:
> Precedence: bulk
>
> I've been trying to think of why we needed this, and I think I have come
> up with something. In VPI, for any given port handle you can ask what it's
> direction would be. In the case of a concatenation, there would be no answer
> without vpiMixedIO. If it got vpiMixedIO, a reasonable application would
> then iterate on the bits of the port and fetch the direction for each bit.
> This is not something that is very relevant from the HDL perspective.

Nope.

It's needed becuase of a definition like

module why(.y());


Port "y" has no direction.

--David Roberts

>
> -Chas
>
>
> Shalom Bresticker wrote:
> > Precedence: bulk
> >
> > Question:
> >
> > In Annex G (vpi_user.h), on p. 818 of 1364-2001b, the following appears:
> >
> > #define vpiDirection 20 /* direction of port: */
> > #define vpiInput 1 /* input */
> > #define vpiOutput 2 /* output */
> > #define vpiInout 3 /* inout */
> > #define vpiMixedIO 4 /* mixed input-output */
> > #define vpiNoDirection 5 /* no direction */
> >
> > What does "no direction" mean?
> >
> > Thanks,
> > Shalom
> >
> >
> > asic@sympatico.ca wrote:
> >
> >
> >>Add the example:
> >>
> >>module m (.p({a,b})) ;
> >> input a;
> >> output b;
> >> not(b,a);
> >> endmodule
> >>
> >>at the end of the examples section in 12.3.3.
> >>Add a comment that mixed IO is allowed in an expression that is a concatenation.
> >>Stu Sutherland tried it in Verilog-XL, NC, VCS and ModelSim and it is legal.
> >>
> >>Regards,
> >>
> >> Anders
> >>
> >>http://boydtechinc.com/cgi-bin/issueproposal.pl?cmd=view&pr=225
> >
> >
> > --
> > Shalom Bresticker Shalom.Bresticker@motorola.com
> > Design & Reuse Methodology Tel: +972 9 9522268
> > Motorola Semiconductor Israel, Ltd. Fax: +972 9 9522890
> > POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 441478
> >
> >
> >
> >
>
>
> --
> Charles Dawson
> Senior Engineering Manager
> NC-Verilog Team
> Cadence Design Systems, Inc.
> 270 Billerica Road
> Chelmsford, MA 01824
> (978) 262 - 6273
> chas@cadence.com
>
>
>

From: Dennis Marsa <drm@xilinx.com>
To: Shalom Bresticker <Shalom.Bresticker@motorola.com>
Cc: etf-bugs@boyd.com
Subject: Re: errata/225: PROPOSAL - The fourth port direction
Date: Mon, 11 Aug 2003 11:26:47 -0600

Shalom Bresticker wrote:
> Precedence: bulk
>
> The following reply was made to PR errata/225; it has been noted by GNATS.
>
> From: Shalom Bresticker <Shalom.Bresticker@motorola.com>
> To: ptf@boyd.com, etf-bugs@boyd.com
> Cc:
> Subject: Re: errata/225: PROPOSAL - The fourth port direction
> Date: Mon, 11 Aug 2003 12:14:50 +0300
>
> Question:
>
> In Annex G (vpi_user.h), on p. 818 of 1364-2001b, the following appears:
>
> #define vpiDirection 20 /* direction of port: */
> #define vpiInput 1 /* input */
> #define vpiOutput 2 /* output */
> #define vpiInout 3 /* inout */
> #define vpiMixedIO 4 /* mixed input-output */
> #define vpiNoDirection 5 /* no direction */
>
> What does "no direction" mean?
>
> Thanks,
> Shalom


My guess is that vpiNoDirection is for ports with no internal connections.

For example:

module M(/*null*/, .A(/*null*/));
endmodule

Dennis


Fix replaced by stefen@boyd.com on Mon Nov 3 14:40:42 2003
Add the example:

module mixed_direction (.p({a, e}));
input a; // p contains both input and output directions
output e;



Unformatted


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