| Add Proposal | Add Analysis | Edit Class, Environment, or Release |
| Number | 357
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| Category | enhancement
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| Synopsis | Proposal for Extending Verilog Data Types
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| State | open
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| Class | enhancement
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| Arrival-Date | Jun 02 2003
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| Originator | Jay Lawrence - Cadence Design Systems
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| Release | 2005
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| Environment |
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| Description |
This proposal extends Verilog data types for system-level modeling and verification. |
| Fix |
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| Audit-Trail |
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| Unformatted |
----web-attachment---- datatypes.pdf |
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