| Add Proposal | Add Analysis | Edit Class, Environment, or Release |
| Number | 311
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| Category | errata
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| Synopsis | Problem with loads in VPI
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| State | open
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| Class | errata-ptf
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| Arrival-Date | Mar 24 2003
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| Originator | James J. Kulikowski <jjk@cadence.com>
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| Release | 2001b
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| Environment |
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| Description |
There is a situation which is not covered by the loads iteration in VPI. For example: module foo; tri t; ram r0 (a, write, read, !t); ... endmodule If we iterate on loads for "t" what should we get for the expression that is an actual for a port of module "r0"? |
| Fix |
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| Audit-Trail |
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| Unformatted |
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