Minutes of the May 27th special IEEE 1364 meeting planning for the
DAC:

Attendees:
karen Pieper     
kurt Baty       
mac         
krisna      
Steve Sharp 
Brad Pierce       
Jay Lawrence        
Gordon


Who will be at DAC?
karen P     Maybe
kurt        Yes
mac         Yes 
krisna      No
Steve Sharp No
Brad        No
Jay         Yes
Anders      Volunteered.
Gordon	    No
Cliff	    Maybe? 

Mac to send out notice of User Input meeting to whatever forums make
sense (Perhaps the Accellera users list)? or any broader reflector to
encourage users to attend User Forum at the DAC.  Perhaps John Cooley?

Another idea is to find the reflector for AMS and invite them.

Slides
  Verilog 2001 timeline
  New publishing
  ETF work
  Draft 2 of 2005  

Kurt:  Mental list of what users might want:

  Access method to attributes of entities.
    $bits, $size, $left, $right
    enum.name()
  Structures Nets & Regs
   Why:
    softwarish (testbench)
    synthesizable
    instruction decoders, busses, endian swap
    nets & reg
   Interface
    use a structure, with drive, read, read/write and no connect.
 
  Orthogonality?
  
  Two state variables
   
  Reals of other than 64 bits

  Libraries/Overload of operators

  Direct C API
   More natural way to link
   handle aspect of current API
   Just want speed
   export/import of a variable; more than that, use VPI

  Dynamic memory ?
    Pointers?
    Pointers + dynamic memory?
    DAMEM: Sparse memory declaration? 
    Linked lists and trees? 

  Standardize attributes?
    Synthesis?
    memory allocation?

  Process control?
    Transaction level language?
    MIT Blue Spec ?

  Portable `protect / `endprotect public/private

  General IP support

  Interface between VHDL & Verilog
    Generate / parameter pass through
    types/ strings/ structs layout pass through

  Analog/Mixed signal 
  
  Use: State 'rules' that should be used for this code
    state the code is 1364-2001/1995/2005 /AMS or whatever
    all semantics
    
Need:

Easel with tablet
Tape & Markers
Projector